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Old 17th November 2013, 12:46 AM   #1
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Default THUMB Editor & Assembler

THUMB Editor & Assembler



Hey guys, so instead of just floating around posts that I am making this editor, I am finally giving an official announcement.:P

So, I have always wanted to have a front end for HackMew's compiler since writing it up in notepad, opening up the command prompt, compiling the binary, and then dumping the contents into a rom honestly was just a little annoying, especially since I screw my code up so much and have to recompile far too many times. haha Either way, I finally got around to it. What this program is, is it is a very basic IDE for THUMB code that supports direct compiling to the rom, as well as a few other features:

~Simple syntax highlighting
~Test Compile
~Output to Binary
~Customize all editor colors
~.org dependent rom compiling
~Quick Comment Insertion


Syntax highlighting:
So, with this part, I really just wanted to improve the readability of code with a little bit of color. So, I added three types of highlighting: comments, large numbers, and labels.

-Comments are anything between "/*" and "*/" and get highest prioity over the other highlighting, meaning if you comment out code, it won't get the other highlighting (like a normal text editor).

-Labels are the heading for each section of your code, so in this piece:

Code:
Main:    ldr r5, .new_bg_table
        push {r5}
        push {r1}
        bl varloader
Main (and varloader) are considered labels. I honestly don't know what the real term for them is, but that is what I call them, otherwise they would just be "things ending in colons". These have the lowest priority.

-Large Numbers are like labels, but they serve to define static numbers that are larger than one byte. Most of the time, they look like this:

Code:
.new_bg_table:    .word    0x08F10000
As you can see, they have the same format as labels. So, I made it simple: if you start it with a period, it will get large number highlighting, and if you don't, it will get label highlighting. Now, I know I could have run a search to see if the next charactors were .word/.hword but I did it this way, so don't yell at me.:P (If you want it changed, by all means do so, the source code is right there will the download, haha)


Test Compile:
This option will basically compile your ASM into a binary and either return the errors or an "Assembled Successfully" message. Good for a quick test to make sure your code compiles. All temp files *should* get deleted once it is done.


Output to Binary:
This option works just like HackMew's batch file, the only difference being a "save as" dialog vs command line.


Customize all editor colors:
I really hope this doesn't need an explanation.......


.org dependent rom compiling:
This was a fun feature to implement. If your ASM has a .org, use this option, as it will jump ahead in your output file to that offset and start working from there. Without this, if you were to compile to the rom, you would get at ton of 00's inserted instead of your code.:P Currently, it doesn't search for the .org, you provide it, but I would like to automate that in the future.


Quick Comment Insertion:
Typing "/* */" can be cumbersome if you are moving quickly, so I just added a new feature: hit "ctrl+q" to quickly add a new comment. PLEASE comment your code. It helps so much.




The future:


What I need to do:
-On close, it will NOT prompt you to save. I really need to add that in, but I haven't gotten to it yet.
-There is only a "save as" function, no regular just "save". Not a necessity, but it would be nice.
-Automated .org finding.
-Force pop-ups to stay in the foreground.

What I might do:
-Customizable syntax highlighting so you can define your own highlights.
-More options like word wrap, disable syntax highlighting (you could just change all of the colors to match the foreground, but yeah...), and font changes.

Bugs:


None yet.

Screenshots:


Spoiler:







Disclaimer:


Please, always back up your roms. This program has been tested, but not extensively and something could go wrong. I am not responsible for a destroyed hack.

Download:


*Please note that this is my first ever GUI program, so the code is very messy and a little inefficient.




~karatekid552

Last edited by karatekid552; 10th December 2013 at 03:06 AM.
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Old 17th November 2013, 01:12 AM   #2
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Looks nice, I'm sure it will be handy when I ever get around to learning how to do anything with Gen III other than muck about with AdvanceMap a bit.
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Old 17th November 2013, 11:33 AM   #3
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This looks fantastic. I love the ability to change the colours as dark themes ftw! Hopefully inserting ASM routines should be infinitely easier now with this. Good job. Any chance of it disassembling as well?
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Old 17th November 2013, 02:47 PM   #4
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Quote:
Originally Posted by Linkandzelda View Post
This looks fantastic. I love the ability to change the colours as dark themes ftw! Hopefully inserting ASM routines should be infinitely easier now with this. Good job. Any chance of it disassembling as well?
Thanks man. Disassembling would be a lot tougher. In all honesty, when I need code disassembled, i just run it through VBA, save it, and then reformat it. If someone has any ideas on how to add in a disassemble feature, feel free to share.

Last edited by karatekid552; 17th November 2013 at 02:52 PM.
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Old 17th November 2013, 02:51 PM   #5
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using a b-tree for each bit.
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Old 17th November 2013, 02:53 PM   #6
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Quote:
Originally Posted by Full Metal ★ View Post
using a b-tree for each bit.
I started learning Python about two months ago, so I haven't gotten that far yet. Could you explain?
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Old 17th November 2013, 05:17 PM   #7
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Quote:
THUMB.1: move shifted register

Opcode Format
Bit Expl.
15-13 Must be 000b for 'move shifted register' instructions
12-11 Opcode
00b: LSL Rd,Rs,#Offset (logical/arithmetic shift left)
01b: LSR Rd,Rs,#Offset (logical shift right)
10b: ASR Rd,Rs,#Offset (arithmetic shift right)
11b: Reserved (used for add/subtract instructions)
10-6 Offset (0-31)
5-3 Rs - Source register (R0..R7)
2-0 Rd - Destination register (R0..R7)
Example: LSL Rd,Rs,#nn ; Rd = Rs << nn ; ARM equivalent: MOVS Rd,Rs,LSL #nn
Zero shift amount is having special meaning (same as for ARM shifts), LSL#0 performs no shift (the the carry flag remains unchanged), LSR/ASR#0 are interpreted as LSR/ASR#32. Attempts to specify LSR/ASR#0 in source code are automatically redirected as LSL#0, and source LSR/ASR#32 is redirected as opcode LSR/ASR#0.
Execution Time: 1S
Flags: Z=zeroflag, N=sign, C=carry (except LSL#0: C=unchanged), V=unchanged.


( ... )
THUMB.2: add/subtract

Opcode Format
Bit Expl.
15-11 Must be 00011b for 'add/subtract' instructions

( ... )
THUMB.3: move/compare/add/subtract immediate

Opcode Format
Bit Expl.
15-13 Must be 001b for this type of instructions

in essence:

[code]
def disassemble(instruction):
position = 15
if instruction&1<<position:#bit 15 is set
# This means the instruction is one of the following:
# load/store half word, pc-relative, get relative adress, modify stack pointer, push/pop
# multiple load/store, conditional branch, unconditional branch, or long branch.
position--
if instruction&1<<position:#bit 14 is set
# must be unconditional branch, or long branch with link.
[code]

You get the idea. Of course, it would make sense to have this as a generator function and send in custom 'instruction' objects that allow you to send in argument information on-the-fly. ( IE, yield Instruction("Add",["r0","r1"])). A b-tree is short for "binary tree" which just means a tree that branches.

The code I gave you would set up the current b-tree--

bit 15
+- on
+---+ bit 14
+----- on

If you really wanted to put some thought into it, you could also export the thumb instruction set in a manner that would let you parse it systematically without essentially hard-coding the instruction set.

Code:
thumb = (
  ( #bit 15 off:,
    ( # bit 15 on:
      ( # bit 14 on: "INSTRUCTION"),
      ( # bit 14 off: "Instruction2")
...
Similar to that.

*edit*
As a matter of fact, you might want to look at this.

Code:
Form|_15|_14|_13|_12|_11|_10|_9_|_8_|_7_|_6_|_5_|_4_|_3_|_2_|_1_|_0_|
 __1_|_0___0___0_|__Op___|_______Offset______|____Rs_____|____Rd_____|Shifted
 __2_|_0___0___0___1___1_|_I,_Op_|___Rn/nn___|____Rs_____|____Rd_____|ADD/SUB
 __3_|_0___0___1_|__Op___|____Rd_____|_____________Offset____________|Immedi.
 __4_|_0___1___0___0___0___0_|______Op_______|____Rs_____|____Rd_____|AluOp
 __5_|_0___1___0___0___0___1_|__Op___|Hd_|Hs_|____Rs_____|____Rd_____|HiReg/BX
 __6_|_0___1___0___0___1_|____Rd_____|_____________Word______________|LDR PC
 __7_|_0___1___0___1_|__Op___|_0_|___Ro______|____Rb_____|____Rd_____|LDR/STR
 __8_|_0___1___0___1_|__Op___|_1_|___Ro______|____Rb_____|____Rd_____|""H/SB/SH
 __9_|_0___1___1_|__Op___|_______Offset______|____Rb_____|____Rd_____|""{B}
 _10_|_1___0___0___0_|Op_|_______Offset______|____Rb_____|____Rd_____|""H
 _11_|_1___0___0___1_|Op_|____Rd_____|_____________Word______________|"" SP
 _12_|_1___0___1___0_|Op_|____Rd_____|_____________Word______________|ADD PC/SP
 _13_|_1___0___1___1___0___0___0___0_|_S_|___________Word____________|ADD SP,nn
 _14_|_1___0___1___1_|Op_|_1___0_|_R_|____________Rlist______________|PUSH/POP
 _17_|_1___0___1___1___1___1___1___0_|___________User_Data___________|BKPT ARM9
 _15_|_1___1___0___0_|Op_|____Rb_____|____________Rlist______________|STM/LDM
 _16_|_1___1___0___1_|_____Cond______|_________Signed_Offset_________|B{cond}
 _U__|_1___1___0___1___1___1___1___0_|_____________var_______________|UNDEF ARM9
 _17_|_1___1___0___1___1___1___1___1_|___________User_Data___________|SWI
 _18_|_1___1___1___0___0_|________________Offset_____________________|B
 _19_|_1___1___1___0___1_|_________________________var___________|_0_|BLXsuf ARM9
 _U__|_1___1___1___0___1_|_________________________var___________|_1_|UNDEF ARM9
 _19_|_1___1___1___1_|_H_|______________Offset_Low/High______________|BL (BLX ARM9)
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Old 17th November 2013, 05:59 PM   #8
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Quote:
Originally Posted by Full Metal ★ View Post
in essence:

[code]
def disassemble(instruction):
position = 15
if instruction&1<<position:#bit 15 is set
# This means the instruction is one of the following:
# load/store half word, pc-relative, get relative adress, modify stack pointer, push/pop
# multiple load/store, conditional branch, unconditional branch, or long branch.
position--
if instruction&1<<position:#bit 14 is set
# must be unconditional branch, or long branch with link.
[code]

You get the idea. Of course, it would make sense to have this as a generator function and send in custom 'instruction' objects that allow you to send in argument information on-the-fly. ( IE, yield Instruction("Add",["r0","r1"])). A b-tree is short for "binary tree" which just means a tree that branches.

The code I gave you would set up the current b-tree--

bit 15
+- on
+---+ bit 14
+----- on

If you really wanted to put some thought into it, you could also export the thumb instruction set in a manner that would let you parse it systematically without essentially hard-coding the instruction set.

Code:
thumb = (
  ( #bit 15 off:,
    ( # bit 15 on:
      ( # bit 14 on: "INSTRUCTION"),
      ( # bit 14 off: "Instruction2")
...
Similar to that.

*edit*
As a matter of fact, you might want to look at this.

Code:
Form|_15|_14|_13|_12|_11|_10|_9_|_8_|_7_|_6_|_5_|_4_|_3_|_2_|_1_|_0_|
 __1_|_0___0___0_|__Op___|_______Offset______|____Rs_____|____Rd_____|Shifted
 __2_|_0___0___0___1___1_|_I,_Op_|___Rn/nn___|____Rs_____|____Rd_____|ADD/SUB
 __3_|_0___0___1_|__Op___|____Rd_____|_____________Offset____________|Immedi.
 __4_|_0___1___0___0___0___0_|______Op_______|____Rs_____|____Rd_____|AluOp
 __5_|_0___1___0___0___0___1_|__Op___|Hd_|Hs_|____Rs_____|____Rd_____|HiReg/BX
 __6_|_0___1___0___0___1_|____Rd_____|_____________Word______________|LDR PC
 __7_|_0___1___0___1_|__Op___|_0_|___Ro______|____Rb_____|____Rd_____|LDR/STR
 __8_|_0___1___0___1_|__Op___|_1_|___Ro______|____Rb_____|____Rd_____|""H/SB/SH
 __9_|_0___1___1_|__Op___|_______Offset______|____Rb_____|____Rd_____|""{B}
 _10_|_1___0___0___0_|Op_|_______Offset______|____Rb_____|____Rd_____|""H
 _11_|_1___0___0___1_|Op_|____Rd_____|_____________Word______________|"" SP
 _12_|_1___0___1___0_|Op_|____Rd_____|_____________Word______________|ADD PC/SP
 _13_|_1___0___1___1___0___0___0___0_|_S_|___________Word____________|ADD SP,nn
 _14_|_1___0___1___1_|Op_|_1___0_|_R_|____________Rlist______________|PUSH/POP
 _17_|_1___0___1___1___1___1___1___0_|___________User_Data___________|BKPT ARM9
 _15_|_1___1___0___0_|Op_|____Rb_____|____________Rlist______________|STM/LDM
 _16_|_1___1___0___1_|_____Cond______|_________Signed_Offset_________|B{cond}
 _U__|_1___1___0___1___1___1___1___0_|_____________var_______________|UNDEF ARM9
 _17_|_1___1___0___1___1___1___1___1_|___________User_Data___________|SWI
 _18_|_1___1___1___0___0_|________________Offset_____________________|B
 _19_|_1___1___1___0___1_|_________________________var___________|_0_|BLXsuf ARM9
 _U__|_1___1___1___0___1_|_________________________var___________|_1_|UNDEF ARM9
 _19_|_1___1___1___1_|_H_|______________Offset_Low/High______________|BL (BLX ARM9)
Okay, so I kind of get it, haha. I deffinitely understand that last chart. I really haven't done any work with data structures yet, so I'll have to figure this out.
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Old 25th November 2013, 05:00 PM   #9
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Yes! Thank you KarateKid!
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Old 1st December 2013, 07:51 PM   #10
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So, apparently this program only runs properly when started from command line. I think it has something to do with calling the assembler using the subprocess.Popen commands.

Last edited by karatekid552; 1st December 2013 at 07:54 PM.
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